Many conventional semiconductor devices include metal-oxide-semiconductor field-effect transistor (MOSFET) and other transistor devices to perform a variety of functions, such as switching, amplification, and the like. As required switching speeds increase and as operating voltages levels decrease in semiconductor products, the performance of transistors within such products needs to be correspondingly improved. For instance, switching speed requirements of MOSFETs and other transistors continue to increase in order to facilitate faster and improved product performance. Moreover, as such devices increasingly find application within wireless communications systems, portable computers, and other low-power, low-voltage devices, MOSFETs and other devices increasingly must be adapted to operate using less power and at lower voltages.
The carrier mobility in a MOSFET device can have a significant impact on power consumption and switching performance. The carrier mobility is a measure of the average speed of a carrier (e.g., holes or electrons) in a given semiconductor, given by the average drift velocity of the carrier per unit electric field. Thus, improved carrier mobility can improve the switching speed of a MOSFET transistor. Moreover, improving the carrier mobility in the device can allow operation at lower voltages. This may be accomplished, in addition, by reducing the channel length and gate dielectric thickness in order to improve current drive and switching performance. However, reducing the gate dielectric thickness results in an increase in gate tunneling current, which in turn degrades the performance of the device by increasing off state leakage. In addition, decreasing gate length generally requires more advanced and expensive lithography technology.
Other attempts at improving carrier mobility in silicon MOSFET devices have included depositing silicon/germanium alloy layers between upper and lower silicon layers under compressive stress, in order to enhance hole carrier mobility in a channel region. However, such buried silicon/germanium channel layer devices have shortcomings, including increased alloy scattering in the channel region that degrades electron mobility, a lack of favorable conduction band offset which mitigates the enhancement of electron mobility and the need for large germanium concentrations to produce strain and thus enhanced mobility. Furthermore, such additional alloy layers and silicon layers are costly, adding further processing steps to the device manufacturing procedure. Thus, there is a need for methods and apparatus by which the carrier mobility and other electrical operational properties of MOSFET and other transistor devices may be improved so as to facilitate improved switching speed and low-power, low-voltage operation, without significantly adding to the cost or complexity of the manufacturing process.